Roberto Suaya

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This paper introduces the first comprehensive and accurate compact resistance–inductance–capacitance– conductance (RLCG) model for through-silicon vias (TSVs) in 3-D ICs valid from lowto high-frequency regimes, with consideration of the MOS effect in silicon, the alternating-current (ac) conduction in silicon, the skin effect in TSV metal, and the eddy(More)
A generalized impedance boundary condition is developed to rigorously model on-chip interconnects in the full-wave surface integral equation by a two-region formulation. It is a combination of the electric-field integral equation for the exterior region and the magnetic-field integral equation for the interior conductive region. The skin effect is,(More)
We investigate appropriate regimes for transmission line propagation of signals on digital integrated circuits. We start from exact solutions to the transmission line equations proposed by Davis and Meindl. We make appropriate modifications due to finite rise time. They affect the delay calculation and hypothesis pertaining the constancy of the(More)
This paper examines the controversy between two approaches to inductance extraction: loop versus partial treatments for integrated circuit applications. We advocate the first one, and explicitly show that the alternative demands monopole-like magnetic configurations as well as dense inductance matrices. We argue that the uncertainties in the loop inductance(More)
We present a gridless method for solving the interior problem for a set of conductors in an homogeneous dielectric, at sufficiently high frequencies, valid for conductor lengths that are not small compared to the minimum wavelength, and transverse dimensions that are large compared to the skin depth. For IC applications, we cover the regime 10--100 GHz and(More)
We present closed form analytical expressions for the mutual inductance between intentional inductors. The formalism is applicable for border to border separations that are longer than O 1 10 of the inductor radius. The results are exact in leading order multipole expansion for the magnetic field generated by a superposition of current loops, acting on an(More)
In this paper we discuss an effective approach to two-dimensional compaction of VLSI circuit layouts. Active devices are described in terms of circular primitives called bubbles. The wires are treated topologically in that no geometric representation is used for them during compaction. This avoids expensive geometrical manipulations of the wires. Cells are(More)
Through-silicon vias (TSVs) in 3-D integrated circuits (ICs), which are used for connecting different active layers, introduce an important source of coupling noise arising from electrical coupling between TSVs and the active regions. This paper, for the first time, presents compact models based on a fully analytical approach for the electrical coupling(More)
With the onset of gigahertz frequencies on clocked digital systems, inductance effects become significant. We investigate appropriate regimes where signal propagation on an IC can be characterized as resulting from transmission line (TL) behavior. The signals propagate at a speed in the proximity of the speed of light in the medium. Our starting points are(More)