Roberto Pereira-Arroyo

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In this paper, the problem of sizing MOS current mode logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of each gate that is part of our MCML basic library. A genetic algorithm (GA) is employed to automatically detect this front in a process that efficiently finds optimal(More)
In this paper, the problem of sizing an Operational Transconductance Amplifier (OTA) is addressed. The Pareto front is introduced as a useful analysis concept in order to explore the design space of such analog circuit. A genetic algorithm (GA) is employed to automatically detect this front in a process that efficiently finds optimal parameterizations and(More)
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