Rip-up and reroute strategies can be applied following use of conventional wiring algorithms to calculate paths for residual connections failed by preceding techniques. The removal of blocking wire to allow new path runs inevitably introduces new (reroute) wiring requirements. In this paper we address the performance implications of various rates of success… (More)
Parallel processing is being recognized as a practical way to achieve very high performance in logic simulation of large designs. This tutorial summarizes many of the basic methods employed, and estimates attainable throughput. Next, data structuring and processing factors are explored as they impact parallel simulation. Experience indicates that support… (More)
Architectural simulation of complex systems is usually constrained by available computational resources. Recently, several commercial parallel processing systems have appeared with price-performance levels that make very intense simulations affordable. In this paper, we briefly review architectural simulation technology, then describe the approach used to… (More)
This paper describes a family of multiprocessor-based accelerated CAD systems applied to electronic computer aided design. It discusses the product requirements, hardware architecture, system software, and principal applications running on the system. It also elaborates on the market and technology factors that influenced the product's development.
This paper presents the necessary and sufficient conditions for routability of a list of two-point nets to be wired in a single row without using vias (single row routing) in a different formulation from that in . These conditions are expressed in terms of left and right block counts (number of left and right blockages that will be encountered by each… (More)
This paper describes an effective implementation of a rectangle probe interconnection routing algorithm. The router successfully handles multilayer boards with foil conducting paths of various widths. Connections defined by the router may utilize one or more conducting layers. Objectives to be achieved by the router are discussed, and implementation… (More)
Design automation of electronic systems is generally separated into a number of distinct areas of effort. Breuer  has divided design automation into the areas of logic synthesis, gate simulation, partitioning, placement, routing, and fault detection and diagnosis. While this separation may not be complete or entirely accurate, these functions generally… (More)
A new multi-layer printed circuit board routing technique is presented which combines two existing algorithms with a new cost function. The present implementation of this new technique handles up to four layers at a time. The earlier works are overviewed and enhancements incorporated in the new implementation are pointed out. Experimental results obtained… (More)