Robert A. Groves

Learn More
A wide-band physical and scalable 2equivalent circuit model for on-chip spiral inductors is developed. Based on physical derivation and circuit theory, closed-form formulas are generated to calculate the RLC circuit elements directly from the inductor layout. The 2model accurately captures ( ) and ( ) characteristics beyond the self-resonant frequency.(More)
This paper provides a detailed description of the IBM SiGe BiCMOS and rf CMOS technologies. The technologies provide high-performance SiGe heterojunction bipolar transistors (HBTs) combined with advanced CMOS technology and a variety of passive devices critical for realizing an integrated mixed-signal system-on-a-chip (SoC). The paper reviews the process(More)
This paper demonstrates a predictive noise parameter estimation methodology for UHV/CVD SiGe HBT’s which combines ac measurement, calibrated ac simulation and two of the latest Y -parameter-based noise models: 1) the thermodynamic noise model, and 2) the SPICE noise model. The bias current and frequency dependence of the minimum noise figure, the optimum(More)
This paper expands the on-chip interconnect-aware methodology for high-speed analog and mixed signal design, presented in [4], into a wider class of designs, including dense layout CMOS design. The proposed solution employs a set of parameterized on-chip transmission line (T line) devices for the critical interconnects, which is expanded to include coplanar(More)
The radio-frequency (rf) performance of a 0.18m CMOS logic technology is assessed by evaluating the cutoff and maximum oscillation frequencies ( and max) the minimum noise figure ( min) and associated power gain ( ) and the 1/ -noise of the devices. Gate-biasing and channel-length and gate-finger-length adjustments are identified as means to optimize the rf(More)
The rapidly expanding telecommunications market has led to a need for advanced rf integrated circuits. Complex rfand mixed-signal system-on-chip designs require accurate prediction early in the design schedule, and time-to-market pressures dictate that design iterations be kept to a minimum. Signal integrity is seen as a key issue in typical applications,(More)
This paper presents five-stage and seven-stage traveling-wave amplifiers (TWA) in a 0.12m SOI CMOS technology. The five-stage TWA has a 4–91-GHz bandpass frequency with a gain of 5 dB. The seven-stage TWA has a 5–86-GHz bandpass frequency with a gain of 9 dB. The seven-stage TWA has a measured 18-GHz noise figure, output 1-dB compression point, and output(More)
Andrade, P. M. 2004. Refúgios ecológicos nas matas do Jequitinhonha. Jornal do Biólogo 37: 6–8. Auricchio, P. 1997. A new locality for Brachyteles arachnoides and the urgency of finding new directions for muriqui conservation. Neotrop. Primates 5(3): 78–80. Fundação Biodiversitas. 2003. Revisão do Atlas de Áreas Prioritárias para a Conservação da(More)