Richard Auletta

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With the dramatic increase in the size and block count of systems on a chip (SOC) over their application specific integrated circuit (ASIC) counterparts, engineers now need assistance beyond the clerical optimization tasks of placement and routing, they need assistance in applying their own expert abilities to design planning. This paper presents an(More)
The influence on the processor performance comparing the CPU register file size to on-chip cache size, in a RISC-type microprocessor is investigated using VHDL modeling. The Intel 80860(or i860) was selected as a model for this study. The Linpack benchmark was used as an example for generating performance estimates. The i860 micmarchitecture was mod-eled(More)
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