Reza Sina Nakhjavani

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The decreasing manufacturing yield of integrated circuits, as a result of rising complexity and decreased feature size, and the emergence of 3D-NoC based design architectures, has necessitated the search for network reconfiguration techniques in order to make faulty networks reusable. In this paper, we first introduce an efficient and scalable hardware(More)
The ever increasing complexity of scientific applications has led to utilization of new HPC paradigms such as Graphical Processing Units (GPUs). However, modifying existing applications to enable them to be executed on GPU can be challenging. Furthermore, the considerable speedup achieved by execution of linear algebra operations on GPUs has added a huge(More)
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