Reza Mahmoudi

Learn More
This paper presents a broadband, static, 2:1 frequency divider in a bulk 90 nm CMOS LP (low-power) technology with maximum operating frequency of 35.5 GHz. The divider exhibits an enhanced input sensitivity, below 0 dBm, over a broad input range of 31 GHz and consumes 24 mA from a 1.2 V supply. The phase noise of the divider is -124.6 dBc/Hz at 1 MHz offset(More)
This paper presents the analysis of the performance of charge pump, and the design strategy and efficiency optimization of 2.4GHz micro-power charge pump using 65nm CMOS technology. The model of the charge pump takes account of the threshold voltage variation, bulk modulation, and the major parasitic capacitor. Charge pump is sensitive to the input voltage(More)
A 30GHz Ka-band low noise amplifier (LNA) has been realized in a 0.25&#x03BC;m SiGe:C BiCMOS technology. A noise figure (NF) of 1.8-2.2 dB has been measured at 26-32 GHz. The achieved 3dB-power bandwidth is larger than 7GHz, with a peak gain of 12.4dB at 29.2GHz. The input 1 dB compression point (ICP<sub>1dB</sub>) is -11dBm and input IP3 is -1.3dBm at(More)
This paper describes a fully integrated differential power amplifier (PA) operating at 60 GHz ISM band and implemented in 45nm CMOS technology. The PA is based on a distributed active transformer (DAT) topology which enables simultaneous power combining and realization of an efficient impedance matching. To cope with the asymmetric nature of DAT, resulting(More)
This paper presents a two-stage fully integrated 60 GHz differential Low Noise Amplifier implemented in a TSMC bulk CMOS 65 nm technology. Implementation of a voltage-voltage feedback enables the neutralization of the Miller capacitance and the achievement of flat gain with a deviation of &#x00B1; 0.25 dB over the entire 6 GHz bandwidth. It features a(More)
This paper presents a low power, low phase noise mm-wave voltage controlled oscillator. The VCO can be tuned from 41 to 44.5 GHz (8% tuning range) and utilizes a differential tuning mechanism based on varactors and fixed MIM capacitors. Fabricated in a bulk CMOS 65 nm technology, it consumes 3.6 mW and exhibits a phase noise of -106 dBc/Hz at 1 MHz offset(More)
A fully integrated passive True Time Delay (TTD) phase shifter with 32ps continuous changing delay time has been realized in a 0.25&#x03BC;m SiGe:C BiCMOS technology. A new TTD architecture is proposed based on broadband matching technique, resulting in less than 4% delay variation over a very large, 10-50GHz frequency span, meanwhile maintaining an input(More)
To preserve the link quality, in fluctuating operating environments, an adaptive antenna matching module is presented that consists of a 5-bit RF-MEMS switched capacitor array, a bipolar 60/30 V MEMS-biasing voltage generator for improved reliability, and an impedance phase detector that provides information on mismatch. It uses an iterative up-down(More)