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Many embedded systems have real-time requirements which are sometimes hard and must be guaranteed at design time, although most embedded systems have soft deadlines in the sense that they can be missed without any catastrophe being caused by that. Scheduling simulations can be used as a necessary but not sufficient schedulability test that is useful for(More)
The correct functioning of real-time systems depends not only on the logically correct response, but also on its timing. This type of system is increasingly present today and the processing demand is such that complex multicore processors are needed. The development of multiprocessors is ahead of the analysis techniques of such systems and it is therefore(More)
Many embedded systems have soft real-time constraints and it is useful to have an estimate for the worst-case response time of each task. Formal analysis provides safe upper bounds but they are too pessimistic for complex architectures. Simulators can be used to establish a lower bound for the worst-case response time, but classic simulators apply arrival(More)
The correct functioning of real-time systems depends not only on the logically correct response, but also the time when it is given. This type of application is increasingly present today and the processing demand is such that complex processors are needed. Unfortunately general purpose processors are not well suitable for hard real-time applications due to(More)
The correct functioning of real-time systems depends not only on the logically correct response, but also the time when it is given. This type of application is increasingly present today and the processing demand is such that complex multi-core processors are needed. The development of multiprocessor is ahead of the techniques of analysis of such systems(More)
Nowadays, many real-time applications are very complex and as the complexity and the requirements of those systems become more demanding, more hardware processing capacity is necessary. Unfortunately, the correct functioning of real-time systems depends not only on the logically correct response but also on the time when it is produced. General-purpose(More)
This paper presents a method to determine the latency of memory instructions, aimed for use in WCET tools. We use a technique known as value analysis. Considering a processor with different data memory latencies, value analysis is used to determine the possible values of processor registers statically, allowing the recognition of memory addresses (main(More)