Ravindra Singh Kushwah

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In this paper, we included designing of low power tunable analog circuits using double gate (DG) MOSFET, where the front gate output is changed by control voltage on the back gate. The DG devices can be used to improve the performance and reduce the power dissipation when front gate and back gate both are independently controlled. In this paper, we included(More)
In this paper, we introduce the unique features by modified symmetrical double-gate (DG) silicon-on-insulator (SOI) MOSFET. The leading modified structure of double gate (DG) SOI MOSFET, reduces short-channel effects (SCEs) when compared with single gate (SG) SOI MOSFET. In this model, we included the calculation of the electrical field, surface potential,(More)
This paper presents a design of a one bit full adder cell based on stack effect using Double Gate MOSFET. This design has been compared with existing one-bit full adder which is designed using power gating technique. In this paper, the proposed circuit has been analyzed for parameters likepower consumption and power delay product. The simulations of the(More)
In this paper, the design and performance of inverter circuit using Double gate MOSFET at 32nm Sub-micron CMOS technology has presented. The DG-MOSFET has a potential to overcome the problem of SCE. DG-MOSFET has been used for improvement in performance and reducing power dissipation. In this work, the propagation delay and dynamic power dissipation is(More)
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