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This is the digital implementations of Sinusoidal Pulse Width Modulation (SPWM) generators based on analog circuits. The FPGA based SPWM generator is capable to operate at switching frequencies up to 3 MHz, thus it is capable to support the high switching frequency requirements of modern single-phase dc/ac power converters. The Existing design the switching… (More)
Today's irreversible computing style, in which bits of information are routinely wiped out (e.g. a NAND gate has 2 input bits, and only 1 output bit), cannot continue. If Moore's Law remains valid until 2020, as many commentators think, then the heat generated in molecular scale circuits that Moore's Law will provide, would be so intense that they will… (More)
This paper describes the analog and power management aspects of a single chip asymmetric digital subscriber line (ADSL) customer premises equipment (CPE) router. We address the system partitioning between analog and digital resulting in optimum system cost and performance for a .13 /spl mu/m CMOS process.