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Heterogeneous multicore processor can integrate merits of different architecture, so it can achieve peak performance as high as processors with special architecture, while keeping as flexible as traditional general purpose processors at the same time. It is a challenge to design a memory sub-system for FT64-3, which is a heterogeneous multicore processor(More)
The performance of off-chip DDRx SDRAM has been greatly restricted by the single physical page that can be activated for each DRAM bank at any time. To alleviate this problem, an on-chip virtual open page buffer (VOPB) for multi-core multi-thread processor is proposed. The VOPB maintains a number of virtual active pages for each bank of off-chip memory,(More)
The architectural advancements in desktop computing have made embedded devices in real time applications to adopt multi core architectures. The main challenge in multi core programming is the process of communication between the different executing cores. Effectiveness of parallel programming in multi core architectures lies in method used for(More)
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