Randi Thomas

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Many popular programs, such as Netscape, use untrusted helper applications to process data from the network. Unfortunately, the unauthenticated network data they interpret could well have been created by an adversary, and the helper applications are usually too complex to be bug-free. This raises signi cant security concerns. Therefore, it is desirable to(More)
Many popular programs, such as Netscape, use untrusted helper applications to process data from the network. Unfortunately, the unauthenticated network data they interpret could well have been created by an adversary, and the helper applications are usually too complex to be bug-free. This raises signi cant security concerns. Therefore, it is desirable to(More)
T he importance of an efficient memory system is increasing as fabrication processes scale down, yielding faster processors and larger memories. This trend widens the processor-memory gap. Not long ago, off-chip main memory was able to supply the CPU with data at an adequate rate. Today, with processor performance increasing at a rate of about 60 percent(More)
Today’s fast-growing data-intensive network services place heavy demands on the backend servers that support them. This paper introduces ISTORE, a novel server architecture that couples LEGO-like plug-and-play hardware with a generic framework for constructing adaptive software that leverages continuous self-monitoring. ISTORE exploits introspection to(More)
The goal of Intelligent RAM (IRAM) is to design a cost-effective computer by designing a processor in a memory fabrication process, instead of in a conventional logic fabrication process, and include memory on-chip. To design a processor in a DRAM process one must learn about the business and culture of the DRAMs, which is quite different from(More)
Studies regarding message sidedness and persuasion indicate that sidedness effects are moderated by the type of two-sided message employed, but do not indicate why various messages differ in persuasiveness. This research tests two causal models of cognitive processing. Model 1 posits that messages produce general evaluations that prompt the generation of(More)
In this paper we develop an optimized algorithm for performing the Fast Fourier Transform (FFT) on the Vector IRAM (VIRAM) architecture in both the fixedand floating-point domains. We discuss the impact of various optimizations on the performance of the FFT algorithm on VIRAM, including both an analysis of the usefulness of various VIRAM ISA features as(More)
Conventional architectures have been developed with a transistor budget of a few hundred thousand and have evolved to designs of about 10 million transistors, achieving impressive performance. However, we believe that these architectures will not scale eeciently another hundredfold to utilize billion-transistor chips eeectively. Here we introduce an(More)