Rahul Razdan

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This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Through a coupling of compile-time analysis routines and hardware synthesis tools, we automatically configure a given set of the hardware-programmable functional units (PFUs) and thus(More)
This paper describes the internal organization of the 21264, a 500 MHz, Out-Of Order, quad-ferch, six-way issue microprocessor. The aggressive cycle-time of the 21264 in combination with many architectural innovations, such as out-oforder and. speculative execution, enable this microprocessor to deliver an estimated 30 SpecInt95 and 50 SpecFp95 performance.(More)
In this paper, a general methodology for design rule development and the CAD tool which implements this methodology, Statistical Design Rule Developer (STRUDEL), are presented. The focus of the proposed approach is the concept of a statistical design rule, which is defined as a geometric design rule with an associated probability of failure. Global lateral(More)
Technical computing has unique requirements which are exemplified by factors such as: an extreme focus on run-time performance, a high degree of responsiveness to the customer base, a continued focus on innovation, concurrent support on multiple computing platforms and most importantly, a very limited set of deep subject matter experts who have the skills(More)