Rafael K. Morizawa

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The VCore(*) based Design Methodology developed in the VCDS(**) project is a novel design methodology utilizing VCores. VCores are reusable functional cores defined at high level. We designed a SoC for Wearable Computer as a vehicle application in the pilot project (Figure 1), and compared our proposed methodology with a conventional RTL based design(More)
In this paper, we propose a novel architecture synthesis method for SoC using VCores. VCores are reusable and configurable high-level descriptions. An initial SoC architecture, which consists of a CPU, buses, and peripherals, is generated based on an architecture template. The hardware and software tradeoff is possible on the architecture model after(More)
The design reuse methodology, which has been developed at the VCDS Project, is a SoC design methodology to reduce the SoC design time using high level design intellectual properties named as Virtual Cores (VCores). In this paper, we propose the VCore based design methodology to synthesize the SoC architecture from the system level specification. This(More)
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