Rafael Escovar

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This paper examines the controversy between two approaches to inductance extraction: loop versus partial treatments for integrated circuit applications. We advocate the first one, and explicitly show that the alternative demands monopole-like magnetic configurations as well as dense inductance matrices. We argue that the uncertainties in the loop inductance(More)
With the onset of gigahertz frequencies on clocked digital systems, inductance effects become significant. We investigate appropriate regimes where signal propagation on an IC can be characterized as resulting from transmission line (TL) behavior. The signals propagate at a speed in the proximity of the speed of light in the medium. Our starting points are(More)
We discuss interconnect parasitic extraction in the nanometer domain using the ITRS 2005 roadmap for future technology generations. Resistance becomes the dominant contribution for timing for local wires at 65 nm and beyond, a major qualitative change. For scaled wires, maintaining global wire routes within 1 clock period is expensive in terms of power(More)
We present closed form analytical expressions for the mutual in-ductance between intentional inductors. The formalism is applicable for border to border separations that are longer than O ¡ 1¢ 10£ of the inductor radius. The results are exact in leading order multi-pole expansion for the magnetic field generated by a superposition of current loops, acting(More)
The present work is centered in the controversy between two approaches to inductance extraction: loop vs. partial treatments for IC applications. We advocate for the first one, justifying this claim in terms of representing more realistically the physical situation, as well as having better sparseness properties. We argue that the drawbacks of loop(More)
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