R. Mariani

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Safety is one of the key issues of future automobile development. Car maker as well as suppliers need to prove that, despite increasing complexity, their electronic systems will deliver the required functionality safely and reliably. Future development and integration of these functionalities will even strengthen the need of safe system development(More)
This paper shows a new approach to low-power low-voltage CMOS MultipleValued (MVL) Ternary Logic, the “complete model”. This logic uses standard technology processes and requires only an extra power supply more than binary CMOS circuits. Using an original characterisation of CMOS multivalued dynamic gates, it is shown as the advantages obtained are better(More)
0141-9331/$ see front matter 2013 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.micpro.2013.08.008 q The DeSyRe Project is supported by the European Commission Seventh Framework Programme, grant agreement n 287611. www.desyre.eu ⇑ Corresponding author. E-mail address: sourdis@chalmers.se (I. Sourdis). I. Sourdis a,⇑, C. Strydis , A. Armato(More)
The referential process is defined in the context of Bucci's multiple code theory as the process by which nonverbal experience is connected to language. The English computerized measures of the referential process, which have been applied in psychotherapy research, include the Weighted Referential Activity Dictionary (WRAD), and measures of Reflection,(More)
Verification quality is a must for functional safety in electronic systems. In automotive, the verification flow is historically based on a layered approach, where each level (model, design and system) has its proper verification and validation methodology. Very often, these methodologies are badly or not interconnected at all one to another, and it's still(More)
The greatest obstacle to a System-on-Chip [SoC] design team’s success is verification. Combining the complexity of digital verification with the increasing integration of larger and more sophisticated analog circuits, the problem is getting exponentially worse. This trend not only presents a challenge to the verification engineers, but to the industry as a(More)
The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such(More)
This paper describes a new approach for analogue/digital verification extending to mixed signal digital concepts such as random constrained stimuli generation, data/protocol checking and functional coverage. A special architecture has been defined for probe and source terminals that bridge analogue and digital domains: such architecture allows an optimized(More)