R. K. Pokharel

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A CMOS low noise amplifier (LNA) for ultra-wideband (UWB) systems is presented. The proposed LNA achieve wide operating bandwidth for 3–10.6 GHz by using resistive shunt feedback topology. Two stage amplifiers and an inter stage circuit are designed to achieve wider gain bandwidth. The shunt resistive feedback are employed in input and output stage(More)
This paper describes the design and implementation of a low-voltage low-power low noise amplifier (LNA) merged with a fully differential double-balanced single-gate mixer for 5GHz wireless systems. The LNA and mixer had been designed to operate in sub-threshold region for low-power dissipation. The proposed design has been fabricated using TSMC(More)
Electromagnetic (EM) wave absorbers have been used for improving the EM environment of an electronic toll collection system on an express highway or a wireless local area network system in an indoor environment. In this paper, an efficient multiray propagation model, which uses three-dimensional geometry and image techniques to trace multiple signal rays(More)
This paper presents the design of a 2-16 GHz ultra wide band low noise amplifier (UWB LNA). The proposed LNA has a gain of 11.5 ± 0.85 dB with NF less than 2.82 dB. Good input and output impedance matching, good isolation and linearity are achieved over the operating frequency band. The proposed UWB LNA consumes 18.14 mW of power from 1.8V supply. This UWB(More)
This paper presents a simple architecture for 8-bit digital controlled oscillator (DCO) on 3-stages ring topology on TSMC 0.35um CMOS technology. A new schematic of tristate inverter is also proposed. The proposed tristate inverter has higher switching speed and low power consumption as compared to conventional one. The control digit changes the driving(More)
The design of a low noise figure (NF), high conversion gain (CG) double-balanced, Gilbert-cell mixer is presented. Since the noise figure of the RF CMOS mixer is strongly affected by flicker noise (1/f), a dynamic current injection technique is used to reduce the flicker noise corner frequency. The current injection circuitry comprises 3 pMOS to inject(More)
This paper describes the design of a high-efficient class-E power amplifier (PA) for 5-GHz wireless transmitter applications using constant envelope modulation scheme in a 0.18-μm CMOS technology. The proposed class-E PA employs injection-locking technique to reduce required input power. Furthermore, cascode topology is utilized for the proposed PA(More)
This paper describes the design of a 2.4-GHz CMOS Class E single-ended power amplifier (PA) for wireless applications in TSMC 0.18-µm CMOS technology. The Class E PA proposed in this paper realizes all inductors with bondwires for the higher quality factor to increase PA performance and to reduce chip size. The single-ended topology is employed(More)
Recently, spiral inductors have widely been used instead of resistors in the design of matching circuits to enhance the thermal noise performance of a wireless transceiver. However, such elements usually have low quality factor (Q) and may encounter the self-resonance in microwave-frequency band which permits its use in higher frequencies, and on the other(More)
This paper presents the design of a CMOS low noise amplifier (LNA) with minimized group delay variations and optimized noise performance for ultra-wideband (UWB) applications. The proposed LNA employs a common source based current reuse topology. Through this configuration gain flatness of 12.25± 0.25 with noise figure (NF) less than 3.8 dB are(More)