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Hardwired ASICs - 50X more efficient than programmable processors - sacrifice programmability to meet the efficiency requirements of demanding embedded systems. Programmable processors use energy mostly to supply instructions and data to the arithmetic units, and several techniques can reduce instruction- and data-supply energy costs. Using these techniques(More)
This paper describes and quantifies the benefits of adding low-overhead active messages to many-core, cache-coherent chip-multiprocessors. The active messages we analyze are user defined and trigger the atomic execution of a custom software handler at the destination. Programmers can use these active messages to both move data with less overhead than cache(More)
With the cost and limitations of scaling CMOS rising, researchers are looking into new computing substrates. One such substrate uses carbon nanotube transistors attached to a DNA self-assembled grid. These grids, containing a limited amount of logic, can be randomly linked together through one bit channels. This thesis looks at improving computation on this(More)
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