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This paper introduces a 3D-stacked logic-in-memory (LiM) system that integrates the 3D die-stacked DRAM architecture with the application-specific LiM IC to accelerate important data-intensive computing. The proposed system comprises a fine-grained rank-level 3D die-stacked DRAM device and extra LiM layers implementing logic-enhanced SRAM blocks that are(More)
This paper introduces a 3D-stacked logic-in-memory (LiM) system to accelerate the processing of sparse matrix data that is held in a 3D DRAM system. We build a customized content addressable memory (CAM) hardware structure to exploit the inherent sparse data patterns and model the LiM based hardware accelerator layers that are stacked in between DRAM dies(More)
Split fabrication, the process of splitting an IC into an untrusted and trusted tier, facilitates access to the most advanced semiconductor manufacturing capabilities available in the world without requiring disclosure of design intent. While researchers have investigated the security of logic blocks in the context of split fabrication, the security of IP(More)
Introduction In the conventional von Neumann model, where computing systems are physically and logically split between memory and CPUs, the “memory wall” and “power wall” are well known bottlenecks that have severely limited the energy efficiency of many applications. Running today’s memory intensive applications, modern computers spend most of their time(More)
This paper presents a design methodology for hardware synthesis of application-specific logic-in-memory (LiM) blocks. Logic-in-memory designs tightly integrate specialized computation logic with embedded memory, enabling more localized computation, thus save energy consumption. As a demonstration, we present an end-to-end design framework to automatically(More)
In this paper we present a local interpolation-based variant of the well-known polar format algorithm used for synthetic aperture radar (SAR) image formation. We develop the algorithm to match the capabilities of the application-specific logic-in-memory processing paradigm, which off-loads lightweight computation directly into the SRAM and DRAM. Our(More)
Neuroimaging evidence implicates the association between rumination and default mode network (DMN) in major depressive disorder (MDD). However, the relationship between rumination and DMN subsystems remains incompletely understood, especially in patients with MDD. Thirty-three first-episode drug-naive patients with MDD and thirty-three healthy controls(More)
In this paperwepresent a local interpolation-based variant of the well-known polar format algorithm used for synthetic aperture radar (SAR) image formation.We develop the algorithm to match the capabilities of the applicationspecific logic-in-memory processing paradigm, which offloads lightweight computation directly into the SRAM and DRAM. Our proposed(More)
We introduce an energy efficient time-sharing pyramid pipeline architecture designed for multi-resolution image analysis in mobile computer vision. The time-sharing pipeline efficiently reduces the off-chip memory traffic by re-organizing the data storage and processing order of an image pyramid. We build a parameterized image pyramid hardware generator and(More)
Recent studies have shown that substance dependence (addiction) is accompanied with altered activity patterns of the default mode network (DMN). However, the neural correlates of the resting-state DMN and betel quid dependence (BQD)-related physiopathological characteristics still remain unclear. Resting-state functional magnetic resonance imaging images(More)