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Through-Silicon Vias (TSVs) have garnered a lot of interest in recent years because TSV is a key enabling technology for three dimensional (3D) Integrated Circuit (IC) stacking, silicon interposer technology, and advanced wafer level packaging (WLP). There has been significant effort in TSV fabrication and electrical design. However, considerably less work(More)
Interposer technology has evolved from ceramic to organic materials and most recently to silicon. Organic substrates exhibit poor dimensional stability, thus requiring large capture pads which make them unsuitable for very high I/Os with fine pitch interconnections. Therefore, there has been a trend to develop silicon interposers. Silicon interposers(More)
Moore's Law has driven the IC industry to a billion transistor chip. But major technical and financial barriers are foreseen beyond 32 nm. One alternative path to this challenge seems to be stacked 3D ICs. But 3D ICs are a small part of any system and the total benefits of miniaturization cannot be realized until the entire system is miniaturized. This is(More)
0026-2714/$ see front matter 2012 Elsevier Ltd. A http://dx.doi.org/10.1016/j.microrel.2012.06.140 ⇑ Corresponding author. E-mail address: suresh.sitaraman@me.gatech.edu Through-silicon vias (TSVs), being one of the key enabling technologies for three dimensional (3D) integrated circuit (IC) stacking, silicon interposer technology, and advanced wafer level(More)
Through-silicon via (TSV), being one of the key enabling technologies for 3D system integration, is being used to interconnect 3D vertically stacked devices, such as logic, memory, sensors, and actuators that are fabricated on separate wafers and then interconnected by either wafer-to-wafer or chip-to-wafer methods. However, thermo-mechanical analyses on(More)
A thermo-mechanical reliability study of through-silicon vias (TSVs) is presented in this paper. TSVs are used to interconnect stacked dies to achieve 3-D packages. As the core of the TSV contains high coefficient of thermal expansion (CTE) copper surrounded by low-CTE SiO<sub>2</sub> and Si materials, the thermo-mechanical reliability of TSVs is a concern.(More)
Oxygen vacancies on metal oxide surfaces have long been thought to play a key role in the surface chemistry. Such processes have been directly visualized in the case of the model photocatalyst surface TiO(2)(110) in reactions with water and molecular oxygen. These vacancies have been assumed to be neutral in calculations of the surface properties. However,(More)
OBJECTIVE This systematic review and meta-analysis aimed to evaluate the overall survival, local recurrence, distant metastasis, and complications of mediastinal lymph node dissection (MLND) versus mediastinal lymph node sampling (MLNS) in stage I-IIIA non-small cell lung cancer (NSCLC) patients. METHODS A systematic search of published literature was(More)
We present a novel approach of using the butylated hydroxytoluene (BHT) antioxidant found in commercial Pluronic F127 samples as a marker of polymer aggregation. The BHT marker was compared to the pyrene dye and static light scattering methods as a way to measure the critical micelle concentration (CMC) and critical micelle temperature (CMT). The n→π(∗)(More)
This paper demonstrates thin glass interposers with fine pitch through package vias (TPV) as a low cost and high I/O substrate for 3D integration. Interposers for packaging of ULK and 3D-ICs need to support large numbers of die to die interconnections with I/O pitch below 50 &#x03BC;m. Current organic substrates are limited by CTE mismatch, wiring density,(More)