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A split-gate structure of power VDMOS is proposed in this paper. The p-base of the split-gate VDMOS is formed by self-aligned ion implanted. Only five masks is used to fabrication while the performance of the split-gate VDMOS is better than the conventional VDMOS. Compared to present structure, the split-gate structure can effectively reduce the device(More)
Since the conventional planar ICs encountered many physical, technological and economic bottlenecks, 3D integration by stacking and connecting function blocks in a vertical fashion is regarded as a viable approach to alleviate such bottlenecks. Through-strata-via (TSV) is one of the most attractive 3D integration solutions, which offers a massive number of(More)
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