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Capacitance-voltage (CV) characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) with different layouts in the gate area, active area, etch-stop layer and contact windows are investigated. The layout dependence of the capacitance values under the channel depletion and accumulation are clarified. Based on the dependencies, capacitance(More)
In this paper, reduction of the gate-induced drain leakage (GIDL) current after drain bias sweeps for p-type polycrystalline-silicon thin-film transistor is reported, which is proposed to be due to local electron generation and trapping near the drain during the drain bias sweep in the kink current region. The reduction of the GIDL current during drain bias(More)
Degradation of the transfer characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) is investigated under visible light illumination (wavelength of 455, 526 and 638nm) and gate bias stress (V<sub>g</sub>=&#x00B1;20V, V<sub>d</sub>=0). Negative shift of the threshold voltage (V<sub>th</sub>) under 455nm illumination is attributed to(More)
Reduction in the off-state leakage current of p-type low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs) after negative bias sweeping is observed and reported in this paper. It is found that the subthreshold and on-state characteristics of poly-Si TFTs are almost unaffected. Electron trapping locally in the gate oxide near the(More)
A unified model is proposed to consistently explain the degradation behaviors of a-IGZO TFTs under different light illumination and gate bias stress conditions. In the proposed model, photo-excited double ionized oxygen vacancies (V<sub>o</sub><sup>2+</sup>) traps and their transportation under the electric field are two key factors that cause the threshold(More)
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