Pushkin R. Pari

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FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing watermarking and fingerprinting techniques successfully embed identification information into FPGA designs to deter IP infringement. However, such methods incur timing and/or(More)
A popular approach to guarantee fault tolerance in safety-critical applications is to run the application on two processors. A checkpoint is inserted at the completion of the primary copy. If there is no fault, the secondary processor terminates its execution. Otherwise, should the fault occur, the second processor continues and completes the application(More)
Boolean Satisfiability (SAT) is often used as the model for a significant and increasing number of applications in Electronics Design Automation (EDA) and many other fields of computer science and engineering. Although the SAT problem belongs to the class NP-complete-problems that do not have a polynomial run time algorithm but answers for which can be(More)
Introduction Finite state machine (FSM) is a computation model that consists of a finite set of states, a start state, an input alphabet, and a transition function that defines the next state and/or outputs based on the current state and input symbols. Finding an equivalent FSM with minimal number of states is generally referred as state minimization or(More)
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