Priyankar Ghosh

Learn More
Full scan based design technique is widely used to alleviate the complexity of test generation for sequential circuits. However, this approach leads to substantial increase in test application time, because of serial loading of vectors. Although BIST based approaches offer faster testing, they usually suffer from low fault coverage. In this paper, we(More)
We present formal methods for determining whether a set of components with given reliability certificates for specific functional properties are adequate to guarantee desired end-to-end properties with specified reliability requirements. We introduce a formal notion for the reliability gap in component-based designs and demonstrate the proposed approach for(More)
An analytical procedure was developed for the detection and quantitation of diazepam in cream biscuits, which were used to commit crime. The method involves the extraction of diazepam with ethanol at room temperature, and the extract is filtered, evaporated to dryness, and redissolved in the mobile phase, methanol-acetonitrile-tetrahydrofuran-water (15 + 55(More)
We present algorithms for generating alternative solutions for explicit acyclic AND/OR structures in non-decreasing order of cost. Our algorithms use a best first search technique and report the solutions using an implicit representation ordered by cost. Experiments on randomly constructed AND/OR DAGs and problem domains including matrix chain(More)
Bug traces produced in simulation serve as the basis for patching the RTL code in order to fix a bug. It is important to prove that the patch covers all instances of the bug scenario; otherwise, the bug may return with a different valuation of the variables involved in the bug scenario. For large circuits, formal methods do not scale well enough to(More)
The stringent power budget of fine grained power managed digital integrated circuits have driven chip designers to optimize power at the cost of area and delay, which were the traditional cost criteria for circuit optimization. The emerging scenario motivates us to revisit the classical operator scheduling problem under the availability of DVFS enabled(More)