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The small-signal conductance technique was extended to extract asymmetric source/drain parasitic resistances. It was also applied in order to analyze the t<sub>WR</sub> delay of DRAM cell transistors in production and to develop a non-planar cell transistor such as recessed access device (RAD) for low-power DRAM cells. Factors limiting the drive current for(More)
— Reduction of electrical parameter variation is essential to achieve high yield and reliability in semiconductor devices. However, variation depends on a large number of process factors, which are often interdependent. In this work, well-calibrated Technology Computer-Aided-Design process and device simulations were performed in a designed experiment to(More)
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