Prasenjit Basu

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Finding a parking space is a common challenge faced by millions of city-dwellers every day. As common is the revenue generation by fee and fine collection in these municipalities. Wireless ad hoc networking technologies offer a new and efficient means to both simplify the process of parking and find collection as well as extending the convenience for(More)
One of the emerging challenges in formal property verification (FPV) technology is the problem of deciding whether sufficient properties have been written to cover the design intent. Existing literature on FPV coverage does not solve this problem adequately, since they primarily analyze the coverage of a specification against a given implementation. On the(More)
Existing methods for formal verification coverage compare a given specification with a given implementation, and evaluate the coverage gap in terms of quantitative metrics. We consider a new problem, namely to compare two formal temporal specifications and to find a set of additional temporal properties that close the coverage gap between the two(More)
Supporting independent VCR-like interactivity in true-video-on-demand requires the allocation of channel to each interactive user. In the worst case, the system must be provisioned with a unique channel for each user. A variety of techniques have been proposed to ease this requirement by aggregating users into groups. Bridging of the temporal skew between(More)
Formal property verification is increasingly being adopted by designers for module level validation. The behavior of a module is typically expressed in terms of the behavioral guarantee of the module under assumptions on its environment. Expressing such assume-guarantee properties correctly in a formal language is a nontrivial task and errors in the(More)
It is essential to formally ascertain whether the RTL validation effort effectively guarantees the correctness with respect to the design's architectural intent. The design's architectural intent can be expressed in formal properties. However, due to the capacity limitation of formal verification, these architectural-properties cannot be directly verified(More)
<i>Design intent coverage</i> is a formal methodology for analyzing the gap between a formal architectural specification of a design and the formal functional specifications of the component RTL blocks of the design. In this article we extend the design intent coverage methodology to hybrid specifications containing both state-machines and formal(More)