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Dynamic power is a keenly analysed design parameter in SRAM memory design especially in low power battery operated systems. A simple way to reduce dynamic power (and leakage power) is to lower the operating voltage to the minimum possible for a given operating speed requirement. The transistor threshold voltages ultimately define the lowest operating(More)
Energy-efficient, low-cost wireless sensor nodes (WSN) will be a key component in enabling the Internet of Things. The main challenges for these nodes are energy efficiency, cost and ease of software development. At ARM Research, we investigate sub-threshold and near-threshold systems using a custom-built 65nm CMOS ARM Cortex-M0+ platform. This paper will(More)
A novel subthreshold sizing strategy utilizing the Inverse Narrow Width Effect is demonstrated that has the largest range of propagation delays within the same cell footprint and lowest variability of any subthreshold sizing strategy thus far proposed. Simulation results and ring oscillators implemented in a commercial 65nm low power process confirm a(More)
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