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Evaluating the security of logic encryption algorithms
TLDR
We present a SAT-based algorithm which allows an attacker to “decrypt” an encrypted netlist using a small number of carefully-selected input patterns and their corresponding output observations. Expand
Functional Analysis Attacks on Logic Locking
TLDR
This paper proposes Functional Analysis attacks on state of the art Logic Locking algorithms (Fall attacks). Expand
Reverse Engineering Digital Circuits Using Structural and Functional Analyses
TLDR
We present a set of algorithms for the reverse engineering of digital circuits starting from an unstructured netlist and resulting in a high-level netlist with components such as register files, counters, adders, and subtractors. Expand
WordRev: Finding word-level structures in a sea of bit-level gates
TLDR
In this paper, we present a systemic way of automatically deriving word-level structures from the gate-level netlist of a digital circuit. Expand
A Formal Foundation for Secure Remote Execution of Enclaves
TLDR
We introduce a verification methodology based on a trusted abstract platform (TAP), a formalization of idealized enclave platforms along with a parameterized adversary. Expand
Reverse engineering digital circuits using functional analysis
TLDR
We present a set of algorithms for the reverse engineering of digital circuits starting from an unstructured netlist and resulting in a high-level netlist with components such as register files, counters, adders and subtracters. Expand
Template-based circuit understanding
When verifying or reverse-engineering digital circuits, one often wants to identify and understand small components in a larger system. A possible approach is to show that the sub-circuit underExpand
Formal verification of taint-propagation security properties in a commercial SoC design
TLDR
We take a tablet SoC design, formulate its critical security requirements as taint-propagation properties, and prove them using a formal verification flow. Expand
A Formal Approach to Secure Speculation
TLDR
We propose a new class of information flow security properties called trace property-dependent observational determinism (TPOD). Expand
Energy-efficient fault tolerance in chip multiprocessors using Critical Value Forwarding
TLDR
We introduce a new energy-efficient fault-tolerant CMP architecture known as Redundant Execution using Critical Value Forwarding (RECVF). RECVF is based on two observations: (i) forwarding critical instruction results from the leading to the trailing core enables the latter to execute faster, and (ii) this speedup can be exploited to reduce energy consumption. Expand
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