A 5.5 GHz fully integrated low-power ESD-protected low-noise amplifier (LNA), designed and verified in a 90 nm RF CMOS technology, is presented for the first time. This 9.7 mW LNA features a 13.3 dB power gain with a noise figure of 2.9 dB, while maintaining an input return loss of −14 dB.
The design of analog front-ends of digital telecommunica-tion transceivers requires simulations at the architectural level. The nonlinear nature of the analog front-end blocks is a complication for their modeling at the architectural level, especially when the nonlinear behavior is frequency dependent. This paper describes a method to derive a bottom up… (More)