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The emerging 4G wireless telecommunication technology poses two inevitable constraints for the chipset design: a high level of integration and algorithm complexity. But even though nanomet-ric CMOS technologies make it possible to integrate the required hardware resources into a single chip, enormous difficulties arise for the on-chip interconnections and(More)
This paper presents the characteristics of an integrated circuit called "turbo4" which can be used as a turbo-encoder or as a turbo-decoder. The turbo-encoder is built using a parallel concatenation of two recursive systematic convolutional codes with constraint length K=5. The turbo-decoder is cascadable, each circuit processing one iteration of the(More)
— The IST project 4MORE [ 1 ] has the objective to implement SoC based demonstrator platform for MC-CDMA based future mobile radio system. The basic system parameters are based on a refinement of the MATRICE [ 2 ] air interface definition. As one of the elementary building blocks of a future airinterface two innovative channel coding schemes have been(More)