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Concurrent systems are commonly veriied after computing a state graph describing all possible behaviors. Unfortunately, this state graph is often too large to be eeectively built. Partial-order techniques have been developed to avoid combinatorial explosion while preserving the properties of interest. This paper investigates the combination of two such(More)
With aggressive technology scaling in nanometer regime, a significant fraction of dynamic power is consumed in the clock network due to its high switching activity. Clock networks are typically synthesized and routed to optimize for zero clock skew. However, clock skew optimization is often accompanied with routing overhead which increases the clock net(More)
Une approche commune a la v eriication des syst emes con-currents consiste a construire le graphe des etats accessibles repr esen-tant de faa con exhaustive le comportement du syst eme et a l'analyser. Malheureusement, ce graphe d' etats est souvent trop grand pour ^ etre eeectivement construit: sa taille evolue le plus souvent de faa con expo-nentielle en(More)
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