Pierre Abouzeid

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This paper presents a multilevel synthesis method on standard cells aiming at reducing both gate and wiring areas. The goal is to decrease the routing factor which is defined as the ratio between the routing area and the gate area. The wiring is taken into account during the synthesis steps (factorization and technology mapping). The approach is based on(More)
This paper proposes a new type of expression for Boolean functions called lexicographical expressions. The basic idea is to impose an input ordering for factoring logical expressions. Several algebraic properties are presented and relations with classical algebraic theory are established. The main result is that all elementary factorizations defined by(More)
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