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Advances and Open Problems in Federated Learning
- P. Kairouz, H. B. McMahan, Sen Zhao
- Computer ScienceFound. Trends Mach. Learn.
- 10 December 2019
Motivated by the explosive growth in FL research, this paper discusses recent advances and presents an extensive collection of open problems and challenges.
More Effective Distributed ML via a Stale Synchronous Parallel Parameter Server
- Qirong Ho, James Cipar, E. Xing
- Computer ScienceNIPS
- 5 December 2013
We propose a parameter server system for distributed ML, which follows a Stale Synchronous Parallel (SSP) model of computation that maximizes the time computational workers spend doing useful work on…
SybilGuard: Defending Against Sybil Attacks via Social Networks
- Haifeng Yu, M. Kaminsky, Phillip B. Gibbons, A. Flaxman
- Computer ScienceIEEE/ACM Transactions on Networking
- 11 August 2006
This paper presents SybilGuard, a novel protocol for limiting the corruptive influences of sybil attacks, based on the ldquosocial networkrdquo among user identities, where an edge between two identities indicates a human-established trust relationship.
SybilLimit: A Near-Optimal Social Network Defense against Sybil Attacks
- Haifeng Yu, Phillip B. Gibbons, M. Kaminsky, Feng Xiao
- Computer ScienceIEEE Symposium on Security and Privacy
- 1 May 2008
The novel SybilLimit protocol is presented, which leverages the same insight as SybilGuard but offers dramatically improved and near-optimal guarantees, and provides the first evidence that real-world social networks are indeed fast mixing.
Base-delta-immediate compression: Practical data compression for on-chip caches
- Gennady Pekhimenko, Vivek Seshadri, O. Mutlu, Phillip B. Gibbons, M. Kozuch, T. Mowry
- Computer ScienceInternational Conference on Parallel…
- 19 September 2012
There is a need for a simple yet efficient compression technique that can effectively compress common in-cache data patterns, and has minimal effect on cache access latency.
LOCI: fast outlier detection using the local correlation integral
- S. Papadimitriou, H. Kitagawa, Phillip B. Gibbons, C. Faloutsos
- Computer ScienceProceedings / International Conference on Data…
- 5 March 2003
Experiments show that LOCI and aLOCI can automatically detect outliers and micro-clusters, without user-required cut-offs, and that they quickly spot both expected and unexpected outliers.
Memory consistency and event ordering in scalable shared-memory multiprocessors
- K. Gharachorloo, D. Lenoski, J. Laudon, Phillip B. Gibbons, Anoop Gupta, J. Hennessy
- Computer ScienceInternational Symposium on Computer Architecture
- 1 May 1990
A new model of memory consistency, called release consistency, that allows for more buffering and pipelining than previously proposed models is introduced and is shown to be equivalent to the sequential consistency model for parallel programs with sufficient synchronization.
Synopsis diffusion for robust aggregation in sensor networks
- Suman Nath, Phillip B. Gibbons, S. Seshan, Zachary R. Anderson
- Computer ScienceACM International Conference on Embedded…
- 3 November 2004
This paper presents a general framework for achievingantly more accurate and reliable answers by combining energy-efficient multi-path routing schemes with techniques that avoid double-counting, and demonstrates the significant robustness, accuracy, and energy-efficiency improvements of synopsis diffusion over previous approaches.
PipeDream: generalized pipeline parallelism for DNN training
- D. Narayanan, A. Harlap, M. Zaharia
- Computer ScienceSymposium on Operating Systems Principles
- 27 October 2019
PipeDream is presented, a system that adds inter-batch pipelining to intra-batch parallelism to further improve parallel training throughput, helping to better overlap computation with communication and reduce the amount of communication when possible.
Ambit: In-Memory Accelerator for Bulk Bitwise Operations Using Commodity DRAM Technology
- Vivek Seshadri, Donghyuk Lee, T. Mowry
- Computer ScienceMicro
- 14 October 2017
Ambit is proposed, an Accelerator-in-Memory for bulk bitwise operations that largely exploits existing DRAM structure, and hence incurs low cost on top of commodity DRAM designs (1% of DRAM chip area).
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