— This paper describes the algorithm and design tradeoffs for multiple hardware implementations of parallel high-radix scalable Montgomery multipliers.
— This paper proposes two parallelized radix-4 scalable Montgomery multiplier implementations. The designs do not require precomputed hard multiples of the operands, but instead uses Booth encoding to compute products. The designs use a novel method for propagating the sign bits for negative partial products. The first design right shifts operands to reduce… (More)
—Digital " assist " circuits can improve the efficiency of traditionally analog circuit blocks, especially as technologies scale to the detriment of analog blocks. We apply some of these techniques to a 10 Gbps optical reciever, and demonstrate 395 fJ/b energy efficiency. Digital calibration blocks wrapped around a simple analog core enabled offset… (More)