Peter Nilsson

Learn More
K-best Schnorr–Euchner (KSE) decoding algorithm is proposed in this paper to approach near-maximum-likelihood (ML) performance for multiple-input–multiple-output (MIMO) detection. As a low complexity MIMO decoding algorithm, the KSE is shown to be suitable for very large scale integration (VLSI) implementations and be capable of supporting soft outputs.(More)
The aim of this study was to determine the frequency and persistence of Staphylococcus aureus carriage in the throat in relation to anterior naris carriage. By use of a sensitive enrichment broth, S. aureus was cultured from the two sites from 259 patients upon admission to an orthopedic ward and from 87 staff members of the same ward. The throat was the(More)
Power consumption in clock of large high performance VLSIs can be reduced by adopting Globally Asynchronous, Locally Synchronous design style (GALS). GALS has small overheads for the global asynchronous communication and local clock generation. We propose methods to a) evaluate the benefits of GALS and account for its overheads, which can be used as the(More)
A new reduced-complexity Schnorr–Euchner decoding algorithm is proposed in this letter for uncoded multi-input multi-output systems with -QAM ( = 4 16 . . .) modulation. Furthermore, a Fano-like metric bias is introduced to the algorithm from the perspective of sequential decoding, as well as an early termination technique. Simulation results show that(More)
This paper describes a VLSI implementation of V-BLAST detection for future Multiple-Input-Multiple-Output (MIMO) Wireless communications. This design is implemented using a 0.35-pm Slayer metal 3.3 V CMOS technology. For a 4transmit and 4-receive antennas system using QPSK modulation scheme, a detecting throughput of 128 Mb/s can be achieved. Furthermore,(More)
This paper presents the design of an embedded automated digital video surveillance system with real-time performance. Hardware accelerators for video segmentation, morphological operations, labeling and feature extraction are required to achieve the real-time performance while tracking will be handled in software in an embedded processor. By implementing a(More)
This paper describes a new hardware architecture for binary image erosion and dilation. The design is to be used in a self contained real-time surveillance system. Thus, low complexity and low power consumption are main constraints. To achieve this goal the aim has been to reduce memory requirements and the number of memory accesses per pixel. By storing(More)