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- Guy Even, Peter-Michael Seidel
- IEEE Symposium on Computer Arithmetic
- 1999

A new IEEE compliant floating-point rounding algorithm for computing the rounded product from a carry-save representation of the product is presented. The new rounding algorithm is compared with theâ€¦ (More)

- Peter-Michael Seidel, Guy Even
- IEEE Transactions on Computers
- 2004

We present an IEEE floating-point adder (FP-adder) design. The adder accepts normalized numbers, supports all four IEEE rounding modes, and outputs the correctly normalized rounded sum/difference inâ€¦ (More)

- Guy Even, Silvia M. MÃ¼ller, Peter-Michael Seidel
- Integration
- 2000

We present a design of an IEEE oating-point multiplier capable of performing either a double-precision multiplication or a single-precision multiplication. In single-precision the la-tency is twoâ€¦ (More)

- Peter-Michael Seidel, Lee D. McFearin, David W. Matula
- IEEE Transactions on Computers
- 2005

For progressively higher radices, the reduction in partial products obtained by the well-known modified Booth multiplier recoding is offset by the need to precompute a rapidly increasing store of oddâ€¦ (More)

- Peter-Michael Seidel, Lee D. McFearin, David W. Matula
- IEEE Symposium on Computer Arithmetic
- 2001

Multipliers are used at many different places in microprocessor design. As the non-memory sub-blocks of the microprocessor with the largest size and delay, multipliers have a big impact on the cycleâ€¦ (More)

- Guy Even, Peter-Michael Seidel, Warren E. Ferguson
- IEEE Symposium on Computer Arithmetic
- 2003

Back in the 60â€™s Goldschmidt presented a variation of Newton-Raphson iterations for division that is well suited for pipelining. The problem in using Goldschmidtâ€™s division algorithm is to present anâ€¦ (More)

- Peter-Michael Seidel, Guy Even
- IEEE Symposium on Computer Arithmetic
- 2001

We present an IEEE floating-point adder (FP-adder) design. The adder accepts normalized numbers, supports all four IEEE rounding modes, and outputs the correctly normalized rounded sumidifference inâ€¦ (More)

- Peter-Michael Seidel
- IEEE Symposium on Computer Arithmetic
- 1997

Engineering design methodology recommends designing a system as follows: Start with an unambiguous speciication, partition the system into blocks, specify the functionality of each block, design eachâ€¦ (More)

We formalize and prove the folklore theorems that Booth recoding improves the cost and cycle time of`standard' multipliers by certain constant factors. We also analyze the number of full adders inâ€¦ (More)

- Steven D. Krueger, Peter-Michael Seidel
- 12th Annual IEEE Symposium on Field-Programmableâ€¦
- 2004

We present the design of an on-line IEEE floating-point (FP) adder. In on-line arithmetic a result is computed as a digit serial output stream from digit serial input streams. The result digits beginâ€¦ (More)