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In this paper a number of reuse approaches for circuit design are analysed. Based on this analysis an algebraic core model for discussion of a general reuse strategy is proposed. Using this model, the aim is to classify different reuse approaches for circuit design, to compare the applied terms and definitions, and to formulate classes of typical reuse(More)
Our paper describes the fundamentals of an IP selection support tool that can be used over the Internet as well as in intranets of larger companies. Such a tool can be used to support the board and chip design activities of electronic circuit designers by informing about available products as IPs or chips to purchase. Online IP catalogues as they have been(More)
In order to extract a suitable common core information model, design representations on both system and architecture levels are analyzed. Following the specification trajectory, three design phases with different description methodologies are found to be widely used. The representations can be affiliated in an easily upgradable way using a compound graph(More)
As simulation is both indispensable and expensive in semiconductor device development, it is quite desirable to attempt any effort reducing the computing costs by more intelligent configuration. These knowledge intensive processes are partly automated by a prototype expert system (called CoDeX). The paper will describe the embedding context, of the expert(More)