Peruvemba Balasubramanian

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The desire for higher performance and higher resolution continuously increases the pixel update rates needed in high performance graphics systems. The increasing density of memory chips on the other hand reduces the pixel update rate that can be provided by the frame buffer. We present the design of a VLSI chip and a graphics system that can sustain(More)
—Dynamic CMOS based transistor level designs of incrementer/decrementer circuit is presented in this work. The design of a new 8-bit decision module is first described. This is followed by elucidation of an original cascading architecture to realize larger size incrementer/decrementer circuits. From SPICE simulations corresponding to a 0.25µ µ µ µm CMOS(More)
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