Pei-Ning Guo

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We present an ordered tree, O-tree, structure to represent non-slicing floor-plans. The O-tree uses only n (2 + rig nl) bits for a floorplan of n rectangular blocks. We define an admissible placement as a compacted placement in both x and y direction. For each admissible placement, we can find an O-tree representation. We show that the number of possible(More)
—We present an ordered tree (O tree) structure to represent nonslicing floorplans. The O tree uses only (2 + lg) bits for a floorplan of rectangular blocks. We define an admissible placement as a compacted placement in both and directions. For each admissible placement, we can find an O-tree representation. We show that the number of possible O-tree(More)
In this paper, we present a physical retiming algorithm for sequential circuits implemented in field programmable gate arrays (FPGAs). This algorithm can speed up the sequential circuits by reducing delay of all critical paths with negative slacks. By taking advantage of the physical information provided by placed circuits, this algorithm integrates two(More)
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