Pawel Poczekajlo

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The authors present an implementation technique of a novel system which can be used to perform 3-D filtering for separable kernels. The structure, consisting of Givens rotations and delay elements, is implemented in FPGA chip. Givens rotations are based on a pipeline CORDIC algorithm. Presented approach is tested against finite precision noise and(More)
A hardware implementation of 3D pipelined Laplace filter has been presented in the paper. The filter is composed of rotation and delay unit structures with a help of CORDIC algorithm. Synthesis of the pipelined 3D Laplace filter is based on synthesis of 2D and ID filters. Proposed implementation of the filter has been compared to the implementation of the(More)
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