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A silicon compilation system for CMOS operational amplifiers (OPASYN) has been developed. The synthesis system takes as inputs system level specifications, fabrication-dependent technology parameters, and geometric layout rules. It produces a design-rule-correct compact layout of an optimized op amp. The synthesis proceeds in three stages: 1) heuristic(More)
An aIgoritbmic analog-to-digital conversion technique is described which is capable of achieving high-resolution conversion without the use of matched capacitors in an MOS technology. The exact integral multiplication of the signal required by the conversion is realized through an algorithmic circuit method which involves charge summing with an MOS(More)
We present an adaptive digital technique to calibrate pipelined analog-to-digital converters (ADCs). Rather than achieving linearity by adjustment of analog component values, the new approach infers component errors from conversion results and applies digital postprocessing to correct those results. The scheme proposed here draws close analogy to the(More)
The growing importance of wireless media for voice and data communications is driving a need for higher integration in personal communications transceivers to achieve lower cost, smaller form factor, and lower power dissipation [1]. One approach to this problem is to integrate the RF functionality in low-cost CMOS technology together with the baseband(More)