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Real-time video processing is an image-processing application that is ideally suited to implementation on FPGAs. We discuss the strengths and weaknesses of a number of existing languages and hardware compilers that have been developed for specifying image processing algorithms on FPGAs. We propose VERTIPH, a new multiple-view visual language that avoids the(More)
1. ABSTRACT This paper contains a description of a novel method for colourising interfaces, based on modelling the interface chracteristics as a complete image, and including information about pragmatic constraints such as the need for distinguishability between interface components. 2. INTRODUCTION In choosing colours for an interface, we must achieve a(More)
When continuous 3D shapes or enclosed structures, such as solid objects or skeletons, are mapped onto a 2D screen, simplifications such as hulls and wire frames are suitable visualization tools, because most or all of the information is concentrated along discontinuities that occupy only a small proportion of the space. Visualizing a colour space is more(More)
In this paper we describe a method of managing the complexity that arises when automatically colouring a realistic GUI interface. This complexity primarily comes from two sources, from the number of items to be coloured - which in interfaces of realistic complexity grows very quickly - and from the interactions between both the items' colours themselves and(More)
– We describe an approach to developing a mathematical model of color harmony. This will be applied in the Color Harmonizer, an automated tool for coloring computer interfaces and websites. The tool will incorporate a color harmony engine that can incorporate a variety of theories for color harmony, and in the first instance, will use the rules proposed by(More)
VERTIPH is a visual language designed to aid in the development of image processing algorithms on FPGAs (Field Programmable Gate Arrays). We justify the use of a visual language for this purpose, and describe the key parts of VERTIPH. One aspect of importance is how to clearly and efficiently represent a pipeline of processors, and in particular distinguish(More)
Scheduling of concurrent processors in a real-time image processing system on FPGA (field programmable gate array) hardware is a not a trivial task. We propose a number of graphical representations for scheduling which were evaluated for use in a visual language for image processing on FPGAs. The proposed representations are illustrated and their strengths(More)