Paul J. Lyons

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Real-time video processing is an image-processing application that is ideally suited to implementation on FPGAs. We discuss the strengths and weaknesses of a number of existing languages and hardware compilers that have been developed for specifying image processing algorithms on FPGAs.We propose VERTIPH, a newmultiple-view visual language that avoids the(More)
2. INTRODUCTION In choosing colours for an interface, we must achieve a balance between several aesthetic and pragmatic objectives, some associated with the interface as a whole, and some associated with individual interface components. The two most important objectives relate to the interface as a whole. First, visual distinction must be maintained between(More)
When continuous 3D shapes or enclosed structures, such as solid objects or skeletons, are mapped onto a 2D screen, simplifications such as hulls and wire frames are suitable visualization tools, because most or all of the information is concentrated along discontinuities that occupy only a small proportion of the space. Visualizing a colour space is more(More)
We describe an approach to developing a mathematical model of color harmony. This will be applied in the Color Harmonizer, an automated tool for coloring computer interfaces and websites. The tool will incorporate a color harmony engine that can incorporate a variety of theories for color harmony, and in the first instance, will use the rules proposed by(More)
VERTIPH is a visual language designed to aid in the development of image processing algorithms on FPGAs (Field Programmable Gate Arrays). We justify the use of a visual language for this purpose, and describe the key parts of VERTIPH. One aspect of importance is how to clearly and efficiently represent a pipeline of processors, and in particular distinguish(More)
The Human-Computer Interaction Group (HCIG) at the Palmerston North Campus of Massey University is a major focus of HCI activity in New Zealand. The majority of those involved in the HCIG are staff and students from the Institute of Information Sciences and Technology within the College of Sciences. This overview describes some of the activities of the HCIG.
Scheduling of concurrent processors in a real-time image processing system on FPGA (field programmable gate array) hardware is a not a trivial task. We propose a number of graphical representations for scheduling which were evaluated for use in a visual language for image processing on FPGAs. The proposed representations are illustrated and their strengths(More)