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Journals and Conferences
Correction of Functional Programs . . . . . . . . . . . . . . . . . . . . . . . . . . 7<lb>M. Alpuente (U.P. Valencia), D. Ballis (U. Udine), S. Escobar (U.P.<lb>Valencia), M. Falaschi (U. Udine), and S. Lucas (U.P. Valencia) Runtime Verification of Concurrent Haskell (work in progress) . . . . . . . . . . 21<lb>V. Stolz (RWTH Aachen) and F. Huch (CAU Kiel)… (More)
Introduction: This Letter presents experimental results of an integrated circuit prototype implementing a simplicial cellular nonlinear network (S-CNN), the circuit architecture and behaviour of which have already been described in . Several CNN realisations have been reported in the literature [2–4], but the operation of most of them is based on the… (More)
In this paper the front-end implementation of an RFID integrated circuit (IC) for a frequency of 134.2 KHz is described. The front-end includes a rectifier circuit and over-voltage and ESD protection circuits. Experimental results are presented. The IC was fabricated in the AMI 0.5 mum process through MOSIS.
Partial evaluation is a method for program specialization based on fold/unfold transformations [4, 15]. Partial evaluation of functional programs uses only static values of given data to specialize the program. In logic programming, the so-called static/dynamic distinction is hardly present, whereas considerations of determinacy and choice points are far… (More)
One of the current problems in software systems development is the increasing complexity of analysing and guaranteeing the reliable behaviour of these systems. This project is oriented towards the development of the methods, tools and techniques necessary for supporting quality software construction, with emphasis on practical application to the industrial… (More)
The design of a low power digital VLSI CMOS integrated circuit for the measurement of signals in the range [10, 300] Hz is presented. The architecture performs a delay calculation in order to determine the bearing angle of a sound source. Restrictions regarding power dissipation are to be improved against a previous implementation, while keeping computing… (More)
This paper presents a VLSI Convolutional Neural Network with special features to implement the Vanishing Point algorithm. The architecture is based on a multi-scale array, with one column processor that implements a neural network with local connectivity, a row processor of SIMD elements that can implement generic convolution and a voting mechanism, which… (More)
In this paper an Application Specific Integrated Circuit (ASIC) specially oriented to the implementation of an identification algorithm of a Nonlinear Output Error (NOE) model structure based on Piecewise Linear (PWL) basis functions is presented. The mathematical foundations for the identification process and the results from an (Field-Programmable Gate… (More)
This paper shows the design and presents experimental results for two different isolated cells of a simplicial cellular nonlinear network (S-CNN) digital pixel processor. The cells were integrated in an n-well non-silicided 0.35 mum process.
Functional logic programming  allows us to integrate some of the best features of the classical declarative paradigms, namely functional and logic programming. The operational semantics of functional logic languages is usually based on narrowing, an evaluation mechanism which combines the reduction principle of functional languages and the resolution… (More)