Pascal Nussbaum

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A haloperidol-treated patient with chronic schizophrenia had a near-arrhythmic circadian rest-activity cycle, whereas rhythms of 6-sulphatoxy-melatonin and core body temperature were of normal amplitude and phase-advanced. Sleep electroencephalography measured throughout a 31-h 'constant-bedrest' protocol revealed a phase-delayed sleep-wake propensity(More)
We studied 11 patients with stable multiple sclerosis (MS) with major depression in terms of response to Sertraline at 100 mg q.d. in an open label trial. Patients were evaluated with self assessment measurements (Carroll scale) prior to and during treatment. Only one patient discontinued the drug during the three month treatment trial, and this was due to(More)
—A 100 100 pixel analog very large scale integration retina is proposed to extract the magnitude and direction of spatial gradients contained in sensed images. The retina implements in a massively parallel fashion, at pixel level, an algorithm based on the concept of steerable filters to compute the gradients. An output rate of up to 1000 frames per second(More)
The crossbreeding between advanced microprocessor design and Field Programmable Gate Arrays (FPGAs) has produced the Field Programmable Processor Array, code named FPPA. The first integrated version has been targeted for low power consumption parallel processing. The FPPA is composed of a 10×10 array of RISC microcontrollers offering up to 500 MIPS at 5 MHz(More)
In order to master the growing complexity of analogue electronic systems, modelling and simulation of analogue hardware at various levels is absolutely necessary. This paper presents an original modelling method based on the graphical description of analogue electronic functional blocks. This method is intended to be automated and integrated into a design(More)
A method for the graphical specification and the automatic generation of analogue behavioural models is presented. This method has been implemented as a new software tool called ABSynth. The behaviour of the component to model is described as a functional diagram, which is then automatically translated into a VHDL-Alike analogue hardware description(More)