Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. This paper studies the task of registerâ€¦ (More)

Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling is one approach forâ€¦ (More)

We analyze the performance of various heuristic algorithms for minimizing realizations of multiple-valued functions by the newly developed CCD 191 and CMOS [W] programmable logic arrays. Theâ€¦ (More)

Modulo scheduling theory can be applied successfully to overlap Fortran DO loops on pipelined computers issuing multiple operations per cycle both with and without special loop architectural supportâ€¦ (More)

[1988] Proceedings. The Eighteenth Internationalâ€¦

1988

The authors compare the performance of three heuristic algorithms for the minimization of sum-of-products expressions realized by the H.G. Kerkhoff and J.T. Butler's (1986) multiple-valuedâ€¦ (More)

Modulo scheduling theory can be applied successfully to overlap Fortran DO loops on pipelined computers issuing multiple operations per cycle both with and without special loop architectural support.â€¦ (More)

We investigate minimal sum-of-products expressions for multiple-valued logic functions for realization by programmable logic arrays. Our focus is on expressions where product terms consist of the MINâ€¦ (More)

We propose a solution to the minimization problem of multiple-valued programmable logic arrays (PLA) that uses simulated annealing. The algorithm accepts a sum-ofproducts expression, divides andâ€¦ (More)