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ÐA compositional verification method from a high-level resource-management standpoint is presented for dense-time concurrent systems and implemented in the tool of SGM (State-Graph Manipulators) with graphical user interface. SGM packages sophisticated verification technology into state-graph manipulators and provides a user interface which views(More)
The design of multiprocessor architectures differs from uniprocessor systems in that the number of processors and their interconnection must be considered. This leads to an enormous increase in the design-space exploration time, which is exponential in the total number of system components. The methodology proposed here, called <italic>Intelligent(More)
Model checking often faces the problem of reducing the large exponential sizes of state-space representations. Several reduction techniques such as bisimulation equivalence, partial-order semantics, and symmetry-based reduction have been proposed, but existing tools do not completely allow a user the flexibility in manipulating state spaces. We propose a(More)
Existing operating systems can manage the execution of software tasks efficiently, however the manipulation of hardware tasks is very limited. In the research on the design and implementation of an embedded operating system that manages both software and hardware tasks in the same framework, two major issues are the dynamic scheduling and the dynamic(More)
With the gradually fading distinction between hardware and software, it is now possible to relocate tasks from a microprocessor to reconfigurable logic and vice versa. However, existing hardware-software scheduling can rarely cope with such runtime task relocation. In this work, we propose a new Relocatable Hardware-Software Scheduling (RHSS) method that(More)
With the computerization of most daily-life amenities such as home appliances, the software in a real-time embedded system now accounts for as much as 70% of a system design. On one hand, this increase in software has made embedded systems more accessible and easy to use, while on the other hand, it has also necessitated further research on how complex(More)
The current technology of verification engineering requires well-trained personnels in logics and automaton theory , who carefully tune their verification packages, to tame the well-known state-space explosion problem. Several researches have resulted in a large number of techniques for reducing the system state-space, such as symmetry-based reductions,(More)
Concurrent Embedded Real-Time Software (CERTS) is intrinsically di€erent from traditional, sequential, independent , and temporally unconstrained software. The veri®cation of software is more complex than hardware due to inherent ¯exibilities (dynamic behavior) that incur a multitude of possible system states. The veri®cation of CERTS is all the more(More)