Panagiotis Merakos

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—The drive for cost reduction has led to the use of CMOS technology in the implementation of highly integrated radios. This paper presents a single-chip 5-GHz fully integrated direct conversion transceiver for IEEE 802.11a WLAN systems, manufactured in 0.18-m CMOS. The IC features an innovative system architecture which takes advantage of the computing(More)
Novel techniques for the power efficient synthesis of sum-of-product computations are presented. Simple and efficient heuristics for scheduling and assignment are described. Different partly static cost functions are proposed to drive the synthesis tasks. The proposed cost functions target the power consumption either in the buses connecting the functional(More)
The trend towards low cost integration of wireless systems has driven the introduction of innovative single chip radio architec-tures in CMOS technologies as an inexpensive alternative to the traditional superheterodyne bipolar implementations. This work describes a 0.18µm CMOS direct conversion transceiver, part of a two-chip solution implementing both PHY(More)
A dual band, 5.15GHz-5.35GHz, 2.4GHz-2.5GHz, zero-IF transceiver is fabricated on a 0.18µm CMOS process. The fully integrated synthesizer and VCO achieve an integrated phase error of 0.8 o at 5GHz. The transmitter achieves –33dB EVM, while the receiver features a 5.2dB noise figure (NF) at 5.25GHz and 3.5dB NF at 2.45GHz. An architecture including feedback(More)
This paper presents a novel methodology for low power implementation of one and multidimensional discrete wavelet transform. The basic computation performed by forward and inverse wavelet transform is the computation of inner products between vectors of data (either input data or wavelet coefficients of previous stages) and filter coefficients. The proposed(More)