Proceedings Design, Automation and Test in Europeâ€¦

2004

The test sequence compaction problem is modeled here, first, as a set covering problem. This formulation enables the straightforward application of set covering methods for compaction. Because of theâ€¦ (More)

The problem of compacting a set of test sequences for sequential circuits is modeled here with the help of a covering matrix, where the test sequences are modeled as columns with variable cost toâ€¦ (More)

This paper presents an algorithm that compacts the Test Sequences generated by a GA-based ATPG program for sequential circuits. In this algorithm, from a set of test sequences, a properly selectedâ€¦ (More)

A method for the reduction of power dissipation during testing of sequential circuits is presented. In this algorithm from an initial set of test sequences a set of subsequences is properly selectedâ€¦ (More)

In this paper a GA-based method that compacts Test Sequences for sequential circuits is presented. In this algorithm from an initial set of test sequences a subset of sequences is selected and fromâ€¦ (More)

This paper presents a genetic algorithm based approach to cope with the problem of sequential circuit test generation. Population sequences having low fitness values but detect extra faults, whichâ€¦ (More)

A method for minimizing power dissipation in CMOS sequential circuits during test application is presented. Initially, the set of test sequences with the transition counts corresponding to eachâ€¦ (More)