Pachara V. Rao

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Power dissipation is one of the most important design objectives in integrated circuits, after speed. As adders are the most widely used components in such circuits, design of efficient adder is of much concern for researchers.From the structure of the CSLA, it is clear that there is scope for reducing the area and power consumption in the CSLA. This work(More)
In this paper, investigation is carried out for the improvement of power system stability by utilizing auxiliary controls for controlling HVDC power flow. The current controller model and the line dynamics are considered in the stability analysis. Transient stability analysis is done on a multi-machine system, where, a fuzzy logic controller is developed to(More)
In this paper, a power amplifier is linearized to remove the inherent distortions occurred during amplification. Cann model of a basic power amplifier is chosen for the linearization purpose. The linearization is achieved by the optimization of the shape factor ࢙using ABC algorithm. The ABC algorithm utilizes swarm optimization method and reduces the system(More)
A new Vertex6-chipscope based implementation scheme of the AES-256 (Advanced Encryption Standard, with 256-bit key) encryption and decryption algorithm is proposed in this paper. For maintaining the speed of encryption and decryption, the pipelining technology is applied and the mode of data transmission is modified in this design so that the chip size can(More)
To explore integrated solar energy harvesting as a power source for low power systems such as wireless sensor nodes, an array of energy scavenging photodiodes(Light dependent resistances) based on a passive-pixel architecture for imagers and have been fabricated together with storage capacitors implemented using on-chip interconnect CMOS logic process.(More)
A new Vertex6-chipscope based implementation scheme of the AES-256 (Advanced Encryption Standard, with 256-bit key) encryption and decryption algorithm is proposed in this paper. For maintaining the speed of encryption and decryption, the pipelining technology is applied and the mode of data transmission is modified in this design so that the chip size can(More)
To explore integrated solar energy harvesting as a power source for low power systems such as wireless sensor nodes, an array of energy scavenging photodiodes(Light dependent resistances) based on a passive-pixel architecture for imagers and have been fabricated together with storage capacitors implemented using on-chip interconnect CMOS logic process.(More)
Power dissipation is one of the most important design objectives in integrated circuits, after speed. As adders are the most widely used components in such circuits, design of efficient adder is of much concern for researchers.From the structure of the CSLA, it is clear that there is scope for reducing the area and power consumption in the CSLA. This work(More)
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