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Low power multipliers with high clock frequencies play an important role in today’s digital signal processing. In this work, the performance analysis of Wallace-tree, Array and Baugh-Wooley multiplier architectures is carried out. Physical verification of all the sub-blocks is performed using HSpice to check their functionality and to optimize for(More)
In today's world, speech processing is one of the challenging issues. However, the acquisition process, transmission channel and external factors produces noise that results to poor quality signal. The quality of the signal has to be increased to an extreme level. To accomplish this huge number of works have been proposed in the literature by proposing(More)
Power amplifiers are important components in every communication system. Power amplifiers are naturally nonlinear in nature. To have a good power amplifier without compromising its linearity, power amplifier linearization is important. There are different methods available for linearization. The inflexibility in defining the system for analysis or(More)
Speech signal quality augmentation involves the challenge to scale down the noise and to perk up the transparency In this paper the performance of two optimization algorithms is compared for denoising the speech signal. The optimization techniques such as Artificial Bee Colony(ABC), Cuckoo Search (CS)algorithm, are used as adaptive algorithms for generating(More)
In digital phase locked loop cascode structured charge pump is proposed with current mismatch less than 0.01%. Steady state error in digital phase locked loop can be minimized by reducing current mismatch. The rail to rail operational amplifier and cascode current source circuit is employed to reduce the mismatch between charging and discharging current.(More)
In OFDM systems, the major obstacle is that the multiplex signal exhibits a very high peak-to-average power ratio (PAR) In this paper propose a new novel method to reduce the PAR.A simple and attractive technique is Active cancellation extension used. However, we observe it cannot achieve the minimum PAR when the target clipping level is set below an(More)
Deterministic Test Pattern Technique. Which is used to reduce the number of test Patterns to find out the faults and hence power consumption will be reduced and 100% fault coverage. Partial matching pattern allows the reduction of the number of patterns used for detecting the random pattern resistant faults. A Multiple control Sequence is used to guide the(More)
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